HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 118

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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4.1.2
Exceptions originate from various sources. Trap instructions and interrupts are handled as follows:
1. The program counter (PC), condition code register (CCR), and extend register (EXR) are
2. The interrupt mask bits are updated. The T bit is cleared to 0.
3. A vector address corresponding to the exception source is generated, and program execution
For a reset exception, steps 2 and 3 above are carried out.
4.1.3
The exception sources are classified as shown in figure 4.1. Different vector addresses are
assigned to different exception sources.
Table 4.2 lists the exception sources and their vector addresses.
In modes 6 and 7, the on-chip ROM available for use after a power-on reset is the 64-kbyte area
comprising addresses H'000000 to H'00FFFF. Care is required when setting vector addresses. In
this case, clearing the EAE bit in BCRL enables the 256-kbyte (128 kbytes/384 kbytes/512
kbytes)* area comprising addresses H'000000 to H'03FFFF (to H'01FFFF/H'05FFFF/H'07FFFF)
to be used. For details, see section 6.2.5, Bus Control Register L (BCRL).
Note: * The amount of on-chip ROM differs depending on the product.
Rev.4.00 Sep. 07, 2007 Page 88 of 1210
REJ09B0245-0400
pushed onto the stack.
starts from that address.
Exception Vector Table
Exception Handling Operation
Exception
sources
• Reset
• Trace
• Interrupts
• Trap instruction
Figure 4.1 Exception Sources
External interrupts: NMI, IRQ7 to IRQ0
Internal interrupts: interrupts from on-chip
supporting modules

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