PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 45
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PEB20571
Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PEB20571.pdf
(291 pages)
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Table 2-13
Pin
No.
25
24
23
22
21
18
17
16
38
35
33
32
31
30
34
11
Preliminary Data Sheet
Symbol In (I)
D7
D6
D5
D4
D3
D2
D1
D0
A6
A5
A3
A2
A1
A0
A4
DACK/
DREQR O
Microprocessor Bus Interface Pins (DELIC-PB)
Out (O)
I/O
The direction of these pins
depends on the value of the
following pins:
CS, RD/DS, WR / R/W and
MODE
I
I
During
Reset
I
I
CLOCK
MASTER
Strap
(internal
pull-down),
refer to
Table 2-19
After
Reset
I
I
L
2-18
Function
Data Bus
Note: When operated in address/data
Address Bus (bits 6 ... 0 except bit 4)
Note: When operated in address/data
Note: In non-DMA mode DACK/A4
DMA Acknowledge
Bit 4 of the address bus, when the
DELIC is configured to non-DMA mode.
Note: In DMA mode A4 is internally
DMA Request for Receive Direction
Note: May be configured to active high
multiplex mode, this bus is used
as a multiplexed AD bus. The
Address
connected to the AD bus.
multiplex mode, this bus is used
as a multiplexed AD bus. The
Data
connected to the AD bus.
input pin should be connected to
A4 of the µP address-bus. In
DMA mode A4 is internally
connected to ‘0’.
connected to ‘0’.
or active low (the default is active
high)
pins
pins
Pin Descriptions
are
are
PEB 20571
externally
externally
DELIC
2003-08
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