PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 185

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

Note: GHDLC channels 3..1 are only accessible, if respective bits in register MUXCTRL
6.2.6.10 LCLK0 Control Register
LCLK0 Control Register (GLCLK0)
Reset value: 0000
Note: ’x’ = unused bits, read as 0.
LCLK0EN
LCLK0(1:0) LCLK0 Output Clock Rate
Preliminary Data Sheet
are set.
15
x
7
x
LCLK0 Output Enable
0 =
1 =
Note: This option is valid only when LCLK0 is output. When LCLK0 is
00 =
01 =
10 =
11 =
H
14
6
x
x
input the frequency is determined externally.
LCLK0 is input (default)
LCLK0 is driven outward via LCLK0 pin
2.048 MHz (default)
4.096 MHz
8.192 MHz
16.384 MHz
13
5
x
x
12
4
x
x
read/write
6-45
11
3
x
x
LCLK0EN
10
2
x
Register Description
Address: D08A
LCLK0(1:0)
9
x
1
DELIC
2003-08
8
0
x
H