PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 217

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 9-2
Parameter
R/W setup time before DS X CS
falling edge
R/W hold time after DS X CS rising
edge
A-bus valid to D-bus valid
DS X CS falling edge to D-bus
D-bus float after DS X CS rising edge t
Note: DS X CS is active (low) when both, DS and CS are active (low)
Figure 9-2
9.2.2
In this mode driving RD ‘low’ causes a read access, driving WR ‘low’ causes a write
access.
Timing for Demultiplexed Bus
In de-multiplexed bus configuration, ALE must be driven ‘high’.
Preliminary Data Sheet
A
R/W
DSxCS
D
µP Access Timing in Intel/Infineon Mode
Timing For Read Cycle In Motorola Mode
Read Cycle in Motorola Mode
t
SRWS
t
t
Symbol
t
t
t
t
DAD
DSD
SRWS
HRWS
DAD
DSD
DSDH
9-3
min.
0
5
0
0
0
Limit Values
max.
20
20
15
t
DSDH
Unit
ns
ns
ns
ns
ns
t
HSRW
Timing Diagrams
Test
Condition
Output load
capacity of
50 pF
DELIC
2003-08