PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 120

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

Preliminary Data Sheet
4.7.5.2
Several GHDLC channels (in a point to multi-point configuration) may be connected to
an external signaling backplane. Arbitration between them may be done in two ways:
Polling or Collision Detection.
In Polling mode the GHDLC master (in a point to multi-point configuration) is
responsible to prevent collisions on the line.
In this case a DELIC-slave has to be polled by the GHDLC-master with a special
requesting frame. The DELIC GHDLC-unit simply receives this frame and passes it to
the µP (like any other frame).
Now it’s the task of the µP to handle the message and provide a corresponding answer
message.
When using Collision Detection many GHDLCs may start transmitting at the same
time. If the GHDLC detects a difference between the transmitted bit (LTxD) and the
collision bit (LCxD), the transmission is aborted. The GHDLC will try to send the
message again after the bus was detected idle for a specified time, according to its
priority class (refer to ITU-T I.430, section 6.1.4).
4.7.6
The memory in the GHDLC is build by a 128x8 bit RAM equally divided between the
GHDLC and the DSP. The GHDLC has a receive buffer and a transmit buffer, divided
into two blocks. One block is allocated to the GHDLC channel in the receive direction,
the other block is read by the DSP. Similarly in the transmit buffer, one block is allocated
to the GHDLC channel in the transmit direction, the other block is written to by the DSP
as shown in Figure 4-14. Note that the GHDLC has higher priority for the buffer access,
whereas the DSP is able to read and write the RAM at a much higher frequency.
In the receive direction blocks are swapped in two cases:
• The receive buffer is full. The swap is issued immediately after the buffer has become
• An end of a frame indication was detected at the beginning of a FSC-frame. To avoid
In the transmit direction blocks are swapped each time a start transmission command is
issued in the command register.
full.
a loss of data in case of a buffer full indication followed by an end of frame indication,
this condition becomes only true if additionally there was no FULL interrupt during the
previous frame.
Arbitration of GHDLCs on a Collision Bus
GHDLC Memory Allocation
4-36
Functional Description
DELIC
2003-08