PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 166

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PEB20571

Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Note: In 1 x 4.096 Mbit/s mode (i.e.16 IOM-2 channels/frame), DRDY is sampled only
6.2.2.5
IDPR Register
Reset value: E0
IDP(7:0)
Note: (x) unused bits read as ’0’
Preliminary Data Sheet
during the D-channels of the first eight IOM-2 channels of every frame.
15
7
x
IOMU Data Prefix Register
IOMU Data Prefix
Determines the high byte of every word being read from the IOM circular-
buffer (I-buffer or D-buffer). The low byte is the data being read from the
circular buffer.
After reset this register contains the MSB of the base address of the A-law-
to-linear ROM table: E0
H
14
6
x
13
5
x
H
.
12
4
x
read/write
6-26
IDP(7:0)
11
3
x
10
2
x
Register Description
Address: D046
9
1
x
DELIC
2003-08
8
0
x
H

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