PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 170

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PEB20571

Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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PTSCn
(15..0)
6.2.3.4
PDPR Register
Reset value: E0
PDP(7:0) PCMU Data Prefix
Note: (x) unused bits read as ’0’
Preliminary Data Sheet
15
7
7
x
Tristate Control for each PCM Time Slot
0 =
1 =
PCMU Data Prefix Register
The data written to this register is read as the most significant byte of every
time slot read by the DSP from the PCMU frame buffers. Can be used for
quick access to the a/µ-law ROM, for conversion of compressed data
(received via the PCM interface) into linear value.
After reset this register contains the MSB of the base address of the a-law-
to-linear ROM table: E0
the PCMU Data Prefix Register should be programmed to E1
H
14
6
6
x
The controlled time slot is invalid
The controlled time slot is valid
13
5
5
x
H
. To enable quick conversion from µ-law to linear,
12
PTSCn(7:0)
4
4
x
read/write
PDP(7:0)
6-30
11
3
3
x
10
2
2
x
Register Description
Address: D072
1
9
1
x
H
.
DELIC
2003-08
0
8
0
x
H

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