m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 296

• Manufacturer Part Number: m30833fjgp
• Description: Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
• Manufacturer: Renesas Electronics Corporation.

R
R
M
e
E
3
. v
J
2
0
Figure 21.23 Prescaler Function and Gate Function
1
C
9
3 .
B
8 /
0
1
(1) With the prescaler function
(2) With the gate function
3
0
3
J
G
4
a
(When the GiTPRj register (i=0, 1, j=6, 7) =02
0 -
o r
(The gate function is cleared by matching the base timer with the GiPOk register.
n
the GT bit in the GiTMCRj register=1, the GOC bit=1)
3 .
1
u
, 1
3
Base timer i
Internal time
measurement
trigger
GiTMj register
f
INPCij pin input
Prescaler
TMijR bit
p
BTi
INPCij pin input
Gate control
signal
TMijR bit
GiTMj register
f
Base timer i
IFEj bit in GiFE
register
Internal time
measurement
trigger
GiPOk register
match signal
1
BTi
2
(
(1)
NOTES:
M
(1)
0
NOTES:
0
1. If the CAS bit in the GiBCR1 register is set to "1" (32-bit time measurement), the group 1 base timer
2. This applies to the second or later prescaler cycles after the PR bit in the GiTMCRj register is set to "1".
3. Bits in the IIO0IR to IIO8IR, IIO10IR to IIO11IR registers. The TM0jR register if the CAS bit is set to "1".
(2)
3
1. If the CAS bit in the GiBCR1 register is set to "1" (32-bit time measurement), the group 1 base timer
2. Bits in the IIO0IR to IIO8IR, IIO10IR to IIO11IR registers. The TM0jR register if the CAS bit is set to "1".
6
2
(3)
increments the counter every time the group 0 base timer overflows.
(2)
(3)
increments the counter every time the group 0 base timer overflows.
C
Page 273
8 /
, 3
M
"H"
"H"
"H"
"H"
"H"
"H"
"L"
"L"
"1"
"0"
"L"
"L"
"L"
"L"
"1"
"0"
"1"
"0"
3
0000
2
FFFF
C
f o
n-2
8 /
16
16
4
3
8
) T
n-1
8
n
n+1
Value of the GiPOk register
n+2
Gate
Write "0" by program
if setting to "0"
2
Write "0" by program if setting to "0"
n+3
16
This trigger input is disabled
due to the gate function.
, the PR bit in the GiTMCR register=1)
n+4
n+5
21. Intelligent I/O (Time Measurement Function)
n
n+6
1
Gate cleared
n+7
n+8
n+9 n+10 n+11
0
Gate
n+12 n+13
n+14
n+12
2