m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 129

• Manufacturer Part Number: m30833fjgp
• Description: Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
• Manufacturer: Renesas Electronics Corporation.

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R
M
10.8 NMI Interrupt
10.9 Key Input Interrupt
e
E
3
. v
J
Figure 10.11 Key Input Interrupt
2
0
The NMI interrupt occurs when the signal applied to the P8
signal. The NMI interrupt is a non-maskable interrupt. Although the P8
rupt input pin, the P8_5 bit in the P8
Key input interrupt request is generated when one of the signals applied to the P10
mode is on the falling edge. The key input interrupt can be also used as key-on wake-up function to exit wait
or stop mode. To use the key input interrupt, do not use P10
shows a block diagram of the key input interrupt. When an "L" signal is applied to any pins in input mode,
signals applied to other pins are not detected as a request signal for an interrupt.
When the PSC_7 bit in the PSC register
occurs regardless of interrupt control register settings. When the PSC_7 bit is set to "1", no input from a
port pin is available even when in input mode.
NOTES:
1
9
C
3 .
B
NOTES:
When the NMI interrupt is not used, connect (pull-up) the NMI pin to Vcc via a resistor. Because the NMI
interrupt cannot be ignored, the pin must be connected.
1. Refer to 24. Programmable I/O Ports for details on the PSC register.
8 /
0
1
______
3
0
______
3
J
G
4
a
P10
P10
P10
P10
Pull-up
transistor
0 -
n
o r
3 .
1
u
7
6
5
4
, 1
3
/KI
/KI
/KI
/KI
p
1
______
______
3
2
1
2
0
(
M
0
0
3
6
Pull-up
transistor
2
Pull-up
transistor
Pull-up
transistor
C
8 /
Page 106
, 3
M
PSC_7 bit
3
2
C
f o
8 /
4
3
8
) T
8
PD10_7 bit
PD10_6 bit
PD10_5 bit
PD10_4 bit
5
PD10_7 bit
PU31 bit in PUR3 register
register indicates input level for this pin.
(1)
is set to "1" (key input interrupt disabled), no key input interrupt
5
______
/NMI pin changes from an "H" signal to an "L"
______
4
to P10
KUPIC Register
Interrupt Control
Circuit
7
5
/NMI pin is used as the NMI inter-
as A/D input ports. Figure 10.11
______
4
Key Input Interrupt
Request
to P10
7
pins in input
10. Interrupts
______
______