psd835g2 STMicroelectronics, psd835g2 Datasheet - Page 67

• Manufacturer Part Number: psd835g2
• Description: Configurable Memory System On A Chip For 8-bit Microcontrollers
• Manufacturer: STMicroelectronics

PSD835G2
16.1
Figure 19. An example of a typical 8-bit multiplexed bus interface
16.2
RESET
MCU
PSD interface to a multiplexed 8-bit bus
Figure 19
PSD. The ADIO port on the PSD is connected directly to the MCU address/data bus.
Address Strobe (ALE/AS, PD0) latches the address signals internally. Latched addresses
can be brought out to port E, For G. The PSD drives the ADIO data bus only when one of its
internal resources is accessed and Read Strobe (RD, CNTL1) is active. Should the system
address bus exceed sixteen bits, ports A, B, C, or F may be used as additional address
inputs.
PSD interface to a non-multiplexed 8-bit bus
Figure 20
and a PSD. The address bus is connected to the ADIO port, and the data bus is connected
to port F. port F is in tri-state mode when the PSD is not accessed by the MCU. Should the
system address bus exceed sixteen bits, ports A, B or C may be used for additional address
inputs.
BHE
ALE
WR
RD
shows an example of a system using a MCU with an 8-bit multiplexed bus and a
shows an example of a system using a MCU with an 8-bit non-multiplexed bus
AD7-AD0
A15-A8
PSD
WR ( CNTRL0 )
RD ( CNTRL1 )
BHE ( CNTRL2 )
RST
ALE ( PD0 )
PORT D
PORT
ADIO
PORT
PORT
PORT
A, B
or C
G
F
MCU bus interface
(OPTIONAL)
( OPTIONAL )
( OPTIONAL )
A23-A16
A7-A0
A15-A8
AI02878D
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