psd835g2 STMicroelectronics, psd835g2 Datasheet - Page 46

• Manufacturer Part Number: psd835g2
• Description: Configurable Memory System On A Chip For 8-bit Microcontrollers
• Manufacturer: STMicroelectronics

Specific features
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10.1
10.2
10.3
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Specific features
Flash Memory Sector Protect
Each primary and secondary Flash memory sector can be separately protected against
Program and Erase cycles. Sector Protection provides additional data security because it
disables all Program or Erase cycles. This mode can be activated through the JTAG/ISP
port or a Device Programmer.
Sector protection can be selected for each sector using the PSDsoft program. This
automatically protects selected sectors when the device is programmed through the JTAG
port or a Device Programmer. Flash memory sectors can be unprotected to allow updating
of their contents using the JTAG port or a Device Programmer. The MCU can read (but
cannot change) the sector protection bits.
Any attempt to program or erase a protected Flash memory sector is ignored by the device.
The Verify operation results in a READ of the protected data. The retention of the Protection
status is thus ensured.
The sector protection status can be read by the MCU through the primary and secondary
Flash memory protection registers (in the CSIOP block) (see
Protection register
Reset Flash
The Reset Flash instruction consists of one WRITE cycle (see
optionally preceded by the standard two WRITE decoding cycles (writing AAh to AAAh and
55h to 554h).
It must be executed after:
●
●
The Reset Flash instruction puts the Flash memory back into normal READ mode
immediately. If an Error condition has occurred (and the device has set the Error flag bit
(DQ5) to ’1’) the Flash memory is put back into normal READ mode within 25 μs of the
Reset Flash instruction having been issued. The Reset Flash instruction is ignored when it
is issued during a Program or Bulk Erase cycle of the Flash memory. The Reset Flash
instruction aborts any on-going Sector Erase cycle, and returns the Flash memory to the
normal READ mode within 25 µs.
Reset (RESET) signal
A pulse on Reset (RESET) aborts any cycle that is in progress, and resets the Flash
memory to the READ mode. When the reset occurs during a Program or Erase cycle, the
Flash memory takes up to 25 µs to return to the READ mode. It is recommended that the
Reset (RESET) pulse (except for the one described in
least 25 µs so that the Flash memory is always ready for the MCU to fetch the bootstrap
instructions after the Reset cycle is complete.
Reading the Flash Protection Status or Flash ID using the Flash instruction.
An Error condition has occurred (and the device has set the Error flag bit (DQ5) to ’1’)
during a Flash memory Program or Erase cycle.
and
Section : Flash Boot Protection
Section 19.1: Power-Up
register).
Section : Flash Memory
Table
7). It can also be
Reset) be at
PSD835G2