psd835g2 STMicroelectronics, psd835g2 Datasheet - Page 43

• Manufacturer Part Number: psd835g2
• Description: Configurable Memory System On A Chip For 8-bit Microcontrollers
• Manufacturer: STMicroelectronics

PSD835G2
8.3
indicates a time-out condition on the Erase cycle; a ’0’ indicates no error. The MCU can read
any location within the sector being erased to get the Toggle flag bit (DQ6) and the Error flag
bit (DQ5).
PSDsoft generates ANSI C code functions which implement these Data Toggling algorithms.
Unlock Bypass
The Unlock Bypass instructions allow the system to program bytes to the Flash memories
faster than using the standard Program instruction. The Unlock Bypass mode is entered by
first initiating two Unlock cycles. This is followed by a third WRITE cycle containing the
Unlock Bypass code, 20h (as shown in
The Flash memory then enters the Unlock Bypass mode. A two-cycle Unlock Bypass
Program instruction is all that is required to program in this mode. The first cycle in this
instruction contains the Unlock Bypass Program code, A0h. The second cycle contains the
program address and data. Additional data is programmed in the same manner. These
instructions dispense with the initial two Unlock cycles required in the standard Program
instruction, resulting in faster total Flash memory programming.
During the Unlock Bypass mode, only the Unlock Bypass Program and Unlock Bypass
Reset Flash instructions are valid.
To exit the Unlock Bypass mode, the system must issue the two-cycle Unlock Bypass Reset
Flash instruction. The first cycle must contain the data 90h; the second cycle, the data 00h.
Addresses are Don’t Care for both cycles. The Flash memory then returns to READ mode.
Figure 7.
Data Toggle flowchart
NO
Table
DQ5 & DQ6
READ DQ6
TOGGLE
TOGGLE
START
READ
DQ6
DQ5
DQ6
FAIL
= 1
=
=
YES
7).
YES
YES
NO
NO
PASS
AI01370B
Programming Flash memory
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