psd835g2 STMicroelectronics, psd835g2 Datasheet - Page 49

• Manufacturer Part Number: psd835g2
• Description: Configurable Memory System On A Chip For 8-bit Microcontrollers
• Manufacturer: STMicroelectronics

PSD835G2
12.3
12.3.1
12.3.2
Figure 9.
Section : VM register
Figure 8.
Configuration modes for MCUs with separate program and
data spaces
Separate space modes
Program space is separated from data space. For example, Program Select Enable (PSEN,
CNTL2) is used to access the program code from the primary Flash memory, while Read
Strobe (RD, CNTL1) is used to access data from the secondary Flash memory, SRAM and
I/O port blocks. This configuration requires the VM register to be set to 0Ch (see
Combined space modes
The program and data spaces are combined into one memory space that allows the primary
Flash memory, secondary Flash memory, and SRAM to be accessed by either Program
Select Enable (PSEN, CNTL2) or Read Strobe (RD, CNTL1). For example, to configure the
primary Flash memory in Combined space, bits b2 and b4 of the VM register are set to ’1’
(see
8031 memory modules – separate space
Figure
DPLD
10).
Priority level of memory and I/O components
RD
RS0
CSBOOT0-3
FS0-FS7
PSEN
describes the VM register.
Highest Priority
Lowest Priority
CS
Primary
Memory
Flash
OE
Primary Flash Memory
Non-Volatile Memory
SRAM, I/O, or
Peripheral I/O
Secondary
Level 1
Level 2
Level 3
Secondary
CS
Memory
Flash
OE
Sector Select and SRAM Select
AI02867D
CS
SRAM
OE
AI02869C
Figure
49/120
9).