psd835g2 STMicroelectronics, psd835g2 Datasheet - Page 112

• Manufacturer Part Number: psd835g2
• Description: Configurable Memory System On A Chip For 8-bit Microcontrollers
• Manufacturer: STMicroelectronics

DC and AC parameters
Figure 46. Peripheral I/O Write timing
Table 44.
1. WR has the same timing as the E and DS signals.
2. Data stable on ADIO pins to data on port F.
Table 45.
1. Programmed to all zero before erase.
2. The polling status, DQ7, is valid tQ7VQV time units before the data byte, DQ0-DQ7, is valid for reading.
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t
t
t
t
t
t
t
t
WLQV–PF
DVQV–PF
WHQZ–PF
WHQV3
WHQV2
WHQV1
WHWLO
Q7VQV
Symbol
Symbol
A / D BUS
ALE /AS
Port F Peripheral Data mode Write timing
Program, Write and Erase times
Flash Program
Flash Bulk Erase
Flash Bulk Erase (not pre-programmed)
Sector Erase (pre-programmed)
Sector Erase (not pre-programmed to “00”)
Byte Program
Program / Erase Cycles (per Sector)
Sector Erase Time-Out
DQ7 Valid to Output (DQ7-DQ0) Valid (Data
Polling)
WR
WR to data propagation delay
Data to port A data propagation delay
WR invalid to port A tri-state
(2)
(1)
Parameter
ADDRESS
(pre-programmed to “00”)
Parameter
tWLQV
Conditions
(PF)
(1)
(2)
(1)
100,000
Min.
tDVQV (PF)
DATA OUT
DATA OUT
PORT F
Min
-70
Typ.
100
8.5
2.2
10
14
3
1
Max
25
22
20
tWHQZ (PF)
Min
Max.
1200
30
30
30
-90
Max
AI02898B
35
30
25
PSD835G2
cycles
Unit
µs
µs
ns
Unit
s
s
s
s
s
ns
ns
ns