psd835g2 STMicroelectronics, psd835g2 Datasheet - Page 106

• Manufacturer Part Number: psd835g2
• Description: Configurable Memory System On A Chip For 8-bit Microcontrollers
• Manufacturer: STMicroelectronics

DC and AC parameters
Table 39.
106/120
f
t
t
t
t
t
t
t
MAXA
SA
HA
CHA
CLA
COA
ARDA
MINA
Symbol
Maximum
frequency
external feedback
Maximum
frequency
internal feedback
(f
Maximum
frequency
pipelined data
Input setup time
Input hold Time
Clock input high
time
Clock input low time
Clock to output
delay
CPLD array delay
Minimum clock
period
CPLD macrocell asynchronous clock mode timing
Figure 39. Synchronous clock mode timing – PLD
CNTA
Parameter
)
REGISTERED
OUTPUT
CLKIN
INPUT
1/(t
Any macrocell
1/(t
1/(t
Conditions
SA
1/f
CHA
SA
+t
CNTA
+t
COA
+t
COA
CLA
–10)
)
)
t CH
Min
12
16
6
7
9
-70
Max
38.4
62.5
47.6
21
11
t CL
Min
12
12
15
28
8
-90
t S
26.32
35.71
Max
37.3
30
16
t H
t CO
Aloc
+ 2
+ 2
PT
Turbo
+ 12
+ 12
+ 12
+ 12
Off
AI02860
Slew
Rate
– 2
PSD835G2
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns