at85c51snd3 ATMEL Corporation, at85c51snd3 Datasheet - Page 82

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at85c51snd3

Manufacturer Part Number
at85c51snd3
Description
At85c51snd3 Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet

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Registers
82
AT85C51SND3B
Table 94. DFCON Register
DFCON (1.89h) – DFC Control Register
Reset Value = 0000 0000b
Table 95. DFCSTA Register
DFCSTA (1.88h Bit Addressable) – DFC Channel Status Register
Number
Number
DRDY1
3-2
Bit
Bit
7
5
6
5
4
1
0
7
7
6
5
4
-
DFPRIO1:0
Mnemonic Description
DFCRCEN
Mnemonic Description
DFABTM
DFBSY1
DFRES
DFRES
DRDY1
SRDY1
SRDY1
EOFI1
DFEN
Bit
Bit
6
6
-
-
Reserved
The value read from this bit is always 0. Do not set this bit.
Data Flow Controller Reset Bit
Set then clear this bit to reset the Data Flow Controller by software.
Reserved
The value read from this bit is always 0. Do not set this bit.
CRC Enable Bit
Set to enable CRC calculation on channel 0.
Clear to disable CRC calculation.
Data Flow Channel Priority Assignment Bits
Refer to Table 93 for channel priority assignment description.
Data Flow Abort Mode Bit
Set to trigger a delayed abort.
Clear to trigger an immediate abort.
Data Flow Controller Enable Bit
Set to enable the Data Flow Controller.
Clear to disable the Data Flow Controller.
Channel 1 Destination Ready Flag
Set by hardware when the destination peripheral of channel 1 is ready.
Cleared by hardware when the destination peripheral of channel 1 is not ready.
Channel 1 Source Ready Flag
Set by hardware when the source peripheral of channel 1 is ready.
Cleared by hardware when the source peripheral of channel 1 is not ready.
Channel 1 End Of Data Flow Interrupt Flag
Set by hardware at the end of a channel 1 data flow transfer.
Cleared by software by setting EOFIA1 in DFCCON. Can not be set by software.
Channel 1 Busy Flag
Set by hardware when a transfer is on-going on channel 1.
Cleared by hardware when no transfer is on-going on channel 1.
EOFI1
5
5
-
DFCRCEN
DFBSY1
4
4
DFPRIO1
DRDY0
3
3
DFPRIO0
SRDY0
2
2
DFABTM
EOFI0
1
1
7632D–MP3–01/07
DFBSY0
DFEN
0
0

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