at85c51snd3 ATMEL Corporation, at85c51snd3 Datasheet - Page 67
at85c51snd3
Manufacturer Part Number
at85c51snd3
Description
At85c51snd3 Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet
1.AT85C51SND3.pdf
(271 pages)
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Mode 1 (16-bit Timer)
Mode 2 (8-bit Timer with Auto-
Reload)
7632D–MP3–01/07
Figure 32. Timer/Counter x (x = 0 or 1) in Mode 0
Figure 33. Mode 0 Overflow Period Formula
Mode 1 configures Timer 0 as a 16-bit Timer with TH0 and TL0 registers connected in
cascade (see Figure 34). The selected input increments TL0 register. Figure 35 gives
the overflow period calculation formula when in timer mode.
Figure 34. Timer/Counter x (x = 0 or 1) in Mode 1
Figure 35. Mode 1 Overflow Period Formula
Mode 2 configures Timer 0 as an 8-bit Timer (TL0 register) that automatically reloads
from TH0 register (see Figure 36). TL0 overflow sets TF0 flag in TCON register and
reloads TL0 with the contents of TH0, which is preset by software. When the interrupt
request is serviced, hardware clears TF0. The reload leaves TH0 unchanged. The next
reload value may be changed at any time by writing it to TH0 register. Figure 37 gives
the auto-reload period calculation formula when in timer mode.
INTx
INTx
CLOCK
CLOCK
TIMx
TIMx
Tx
Tx
TMOD Reg
TMOD Reg
TCON Reg
TCON Reg
GATEx
GATEx
TRx
TRx
÷ 6
÷ 6
TMOD Reg
TMOD Reg
C/Tx#
C/Tx#
0
1
0
1
TFx
TFx
PER
PER
=
=
6
6 ⋅
⋅
(65536 – (THx, TLx))
(16384 – (THx, TLx))
(8 bits)
(8 bits)
THx
THx
F
F
TIMx
TIMx
(5 bits)
(8 bits)
TLx
TLx
Overflow
Overflow
TCON Reg
TCON Reg
TFx
TFx
Timer x
Interrupt
Request
Timer x
Interrupt
Request
67
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