peb2035 ETC-unknow, peb2035 Datasheet - Page 84
peb2035
Manufacturer Part Number
peb2035
Description
Communications Advanced Cmos Frame Aligner
Manufacturer
ETC-unknow
Datasheet
1.PEB2035.pdf
(134 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2035
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Company:
Part Number:
peb2035N
Manufacturer:
SIEMENS
Quantity:
25
Company:
Part Number:
peb2035N
Manufacturer:
INFINEON
Quantity:
5 510
Part Number:
peb2035N
Manufacturer:
MIENENS
Quantity:
20 000
Part Number:
peb2035N-V4.1
Manufacturer:
SIMENS
Quantity:
20 000
Part Number:
peb2035N-VA3
Manufacturer:
SIMENS
Quantity:
20 000
Company:
Part Number:
peb2035NV4.1
Manufacturer:
SIEMENS
Quantity:
5 076
Company:
Part Number:
peb2035NV4.1
Manufacturer:
SIEMENS
Quantity:
5 087
Part Number:
peb2035NV4.1
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Company:
Part Number:
peb2035P
Manufacturer:
SIEMENS
Quantity:
5 510
XS7 … XS0 … Transmit Signaling Data
Transmit S
Value after RESET: undefined
XSN
XSN7 … XSN0 … Transmit S
Semiconductor Group
the
If the use of the internal signaling registers is enabled via bit XC0.ISIG, the contents of this
2-byte stack will be sent one after the other in time-slot 16 of the outgoing PCM frame. A
(DMA/interrupt) request at port XREQ requires loading the stack with two bytes of signaling
data. If the ACFA requires new information before a pending request has been answered,
the DMA slip indication RSP.DSLP will be set.
Access to this stack is possible
– via a normal write cycle to the chip address location plus stack address (0A Hex), or
– via a direct write access with the signal at port ACKNLQ as access enable in conjunction
with a write cycle without the need of generating the chip enable signal at port CEQ. This
feature is useful for memory-to-I/O transfer.
If request XREQ is ignored, transmission of the second byte will be repeated until a new
information is written to the stack. Although the DMA slip indication RSP.DSLP has been
set, function of stack RSIG is unchanged. The function simplifies realization of HDLC
procedures via microprocessor interface (idle code transmission etc.).
(NOT READABLE)
If the Sn-bit stack mode is enabled by setting bits MODE.CRC = 1 and MODE.ENSN = 1,
transmit multiframe flag RSP.XFLG requests that five bytes of Sn-bit information be written
to this stack. In addition, a transmit multiframe begin interrupt may be generated by setting
bits CCR.AINT and XSP.MXMB. Contents of this stack will be sent in the service words of
the next outgoing CRC multiframe (or doubleframe) if none of the time-slot 0 transparent
modes is enabled. The first byte written to this stack contains the information for the eight
XY4-bits per multiframe (bit slot 8 of every service word). XSN7 will be sent out in frame 1,
XSN0 in frame 15.
If requests for new information will be ignored, current contents will be repeated.
a
- Bit Stack (WRITE)
7
XSN7
n
-Bit Data
84
XSN0
0
PEB 2035
(0B)