peb2035 ETC-unknow, peb2035 Datasheet - Page 34

• Manufacturer Part Number: peb2035
• Description: Communications Advanced Cmos Frame Aligner
• Manufacturer: ETC-unknow

For transmit direction, contents of time-slot 0 are additionally determined by the selected
transparent mode:
Transparent
Mode
–
XSP.TT0
XSP.TTOS
EMOD.TT0X
1)
S
As an extension for access to S
implemented to allow the usage of internal S
This function is enabled by setting MODE.CRC = 1, MODE.ENSN = 1 and EMOD.DFSN = 1.
The new function uses an internal 16-frame structure but no CRC multiframe alignment/generation
is performed although MODE.CRC is set to one. For more details refer to chapter CRC-Multiframe
and to description of status flags RFLG and XFLG.
Synchronization Procedure
Synchronization status is reported via bit RSR.LOS. Framing errors are counted by the Framing
Error Counter (FEC). Asynchronous state is reached after detecting 3 or 4 consecutive incorrect
FAS words or 3 or 4 consecutive incorrect service words (bit 2 1 in time-slot 0 of every other frame
not containing the frame alignment word), the selection is done via bit RC1.ASY4. Additionally, the
service word condition can be disabled.
In asynchronous state, counting of framing errors will be stopped and AIS is automatically sent to
the system internal highway (can be disabled via bit EMOD.DAIS).
The resynchronization procedure starts automatically after reaching the asynchronous state.
Additionally, it may be invoked user controlled via bit: CCR.FRS (Force Resynchronization: the FAS
word detection is interrupted. In connection with the above conditions this will lead to asynchronous
state. After that, resynchronization starts automatically).
Synchronous state is reached after detecting:
– a correct FAS word in frame n,
– the presence of the correct service word (bit 2 = 1) in frame n + 1
– a correct FAS word in frame n + 2.
Undisturbed operation starts with the beginning of the next doubleframe.
Semiconductor Group
a
Note: As a special extension for double frame format, the S
- Bit Access
Framing
(int. generated)
via pin XDI
(int. generated)
(int. generated)
a
-bit information via registers RSW and XSW a new option is
A Bit
XSW.XRA
via pin XDI
XSW.XRA
XSW.XRA
Source for
a
-bit stacks RSN and XSN in doubleframe format.
34
S
XSW.XY0..4
via pin XDI
via pin XDI
via pin XDI
a
Bits
n
-bit stack may be used optionally.
1)
S
XSW.XSIS , XSP.XSIF
via pin XDI
via pin XDI
via pin XDI
i
Bits
PEB 2035