peb2035 ETC-unknow, peb2035 Datasheet - Page 16

• Manufacturer Part Number: peb2035
• Description: Communications Advanced Cmos Frame Aligner
• Manufacturer: ETC-unknow

1.3
P-LCC
Pin No.
37
38
Semiconductor Group
Pin Definitions and Functions (cont’d)
P-DIP
Pin No.
33
34
Symbol
XCHPY /
AFT
V
SS
Input (I)
Output (O)
I
I/O
I
Function
Transmit Channel Parity
Externally generated even/odd parity signal which
supplements the number of ones of each transmit
channel on XDI to an even/odd quantity. Latching
of data on XCHPY is coincident with latching of
the LSB (bit 8) of the corresponding time-slot if the
external transmit channel parity mode is enabled
via bit XCO.EPY. The parity type is programmed
by bit XC0.EPYS.
NOTE: To avoid difficulties for external parity
generation the parity signal related to channels
with signaling information is adjusted internally.
PCM 24: Additional Function Transmit
If enabled via bit ACR.DLC (bit ACR.EXMF = 0),
this output provides a 4 kHz signal which marks
the DL-bit position within the data stream on XDI.
It can be used as transmit strobe signal for
external data link controllers.
Additionally, this port can operate as input for
External Transmit Multiframe Synchronization
which defines frame 1 of the Multiframe on XDI
(ACR.EXMF = 1, ACR.DLC = x). Minimum pulse
length is 244 ns. Latching is done equivalent to
latching data via XDI. The signal has to be issued
during frame 1 and has to be reset at least one bit
before begin of frame 2. Recommended: AFT
begins with the first bit of time-slot 0, frame 1 of
XDI.
Notes: A new multiframe position has been settled
at least one multiframe after pulse AFT has been
supplied. If old and new multiframe position differ
from each other, signal XMFB may be up to four
frames long. Moreover, if stack XSIG is enabled
(DMA mode), a re-initialisation for DMA transmit
direction is recommended.
Ground (0 V)
16
PEB 2035