peb2035 ETC-unknow, peb2035 Datasheet - Page 23

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peb2035

Manufacturer Part Number
peb2035
Description
Communications Advanced Cmos Frame Aligner
Manufacturer
ETC-unknow
Datasheet

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2
The Advanced CMOS Frame Aligner provides the interface between a primary rate PCM (T1 or
CEPT) transmission line and any digital system that connects to a 2048- or 4096-kbit/s PCM
highway. An example is given in figure 1, where the system interface is handled by a space-time
switch, in this case the Siemens PEB 2045 (MTSC). This figure shows an optimized implementation
of a complete Primary Access Interface (with CCS signaling) consisting of four CMOS circuits:
ACFA: Advanced CMOS Frame Aligner
HSCX: High-Level Serial Communication Controller Extended
MTSC: Memory Time Switch CMOS
IPAT:
Figure 1
Primary Access Interface
The ACFA provides several ways of accessing the signaling data which it extracts from/inserts into
the PCM carrier data stream. The example in figure 1 shows a case where signaling is sent to the
system internal highway in one of the (otherwise) unequipped time-slots, to be processed by an
autonomous signaling controller. In the case of message oriented common channel signaling
Semiconductor Group
Interface
System Integration
Line
Overvoltage
Protection
ISDN Primary Access Transceiver
(1544
Interface
Ternary
/
2048
kbit/s)
PEB 2235
IPAT
R
Dual Rail
Interface
Microprocessor Interface
PEB 2035
ACFA
23
SAB 82525
(2048 /4096 kbit/s)
HSCX
Highway
Primary
Internal
2048 kHz
PEB 2045
MTSC
ITS03522
PEB 2035
(2048
8192 kbit/s)
CLK
SYP
Interface
System
/4096

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