ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 73

• Manufacturer Part Number: ep1agx50d
• Description: Arria Gx Device Data Sheet
• Manufacturer: Altera Corporation

Figure 2–45. M4K RAM Block LAB Row Interface
Altera Corporation
May 2008
Direct link
interconnect
to adjacent LAB
Direct link
interconnect
from adjacent LAB
C4 Interconnect
M4K RAM Block Local
Interconnect Region
16
resources. Up to 16 direct link input connections to the M4K RAM block
are possible from the left adjacent LABs and another 16 are possible from
the right adjacent LAB. M4K RAM block outputs can also connect to left
and right LABs through direct link interconnect.
M4K RAM block to logic array interface.
M-RAM Block
The largest TriMatrix memory block, the M-RAM block, is useful for
applications where a large volume of data must be stored on-chip. Each
block contains 589,824 RAM bits (including parity bits). The M-RAM
block can be configured in the following modes:
■
■
■
■
True dual-port RAM
Simple dual-port RAM
Single-port RAM
FIFO
datain
control
signals
clocks
LAB Row Clocks
M4K RAM
address
Block
dataout
byte
enable
36
Arria GX Device Handbook, Volume 1
6
Figure 2–45
Arria GX Architecture
Direct link
interconnect
to adjacent LAB
Direct link
interconnect
from adjacent LAB
R4 Interconnect
shows the
2–65