ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 13

• Manufacturer Part Number: ep1agx50d
• Description: Arria Gx Device Data Sheet
• Manufacturer: Altera Corporation

Figure 2–3. Clock Multiplier Unit
Altera Corporation
May 2008
CMU Block
Reference Clock
Global Clock (1),
Inter-Transceiver
from REFCLKs,
Lines
Figure 2–3
The transmitter PLL multiplies the input reference clock to generate the
high-speed serial clock required to support the intended protocol. It
implements a half-rate voltage controlled oscillator (VCO) that generates
a clock at half the frequency of the serial data rate for which it is
configured.
Transmitter Channels [3:2]
Transmitter Channels [1:0]
Transmitter
PLL
shows the block diagram of the clock multiplier unit.
Central Clock
Gen Block
Divider Block
Divider Block
Gen Block
Local Clock
TX Clock
Local Clock
TX Clock
Divider
Block
Arria GX Device Handbook, Volume 1
and Low-Speed Parallel Clocks
and Low-Speed Parallel Clocks
Transmitter High-Speed Serial
Transmitter High-Speed Serial
Arria GX Architecture
2–5