ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 167
ep1agx50d
Manufacturer Part Number
ep1agx50d
Description
Arria Gx Device Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EP1AGX50D.pdf
(296 pages)
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Altera Corporation
May 2008
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
SDI Receiver Jitter Tolerance
Sinusoidal Jitter Tolerance
(peak-to-peak)
Sinusoidal Jitter Tolerance
(peak-to-peak)
Table 4–7. Arria GX Transceiver Block AC Specification
Dedicated REFCLK pins were used to drive the input reference clocks.
Jitter numbers specified are valid for the stated conditions only.
Refer to the protocol characterization documents for detailed information.
The jitter numbers for XAUI are compliant to the IEEE802.3ae-2002 Specification.
The jitter numbers for PCI Express are compliant to the PCIe Base Specification 2.0.
The jitter numbers for Serial RapidIO are compliant to the RapidIO Specification 1.3.
The jitter numbers for GIGE are compliant to the IEEE802.3-2002 Specification.
The HD-SDI and 3G-SDI jitter numbers are compliant to the SMPTE292M and SMPTE424M specifications.
Table
Description
4–7:
(8)
Jitter Frequency = 15 KHz
Data Rate = 2.97 Gbps (3G)
REFCLK
Pattern = Single Line Scramble
Color Bar
Equalization
DC Gain = 0 dB
Jitter Frequency = 100 KHz
Data Rate = 2.97 Gbps (3G)
REFCLK
Pattern = Single Line Scramble
Color Bar
Equalization
DC Gain = 0 dB
Jitter Frequency = 148.5 MHz
Data Rate = 2.97 Gbps (3G)
REFCLK
Pattern = Single Line Scramble
Color Bar
Equalization
DC Gain = 0 dB
Jitter Frequency = 20 KHz
Data Rate = 1.485 Gbps (HD)
REFCLK
Pattern = 75% Color Bar
No Equalization
DC Gain = 0 dB
Jitter Frequency = 100 KHz
Data Rate = 1.485 Gbps (HD)
REFCLK
Pattern = 75% Color Bar
No Equalization
DC Gain = 0 dB
= 148.5 MHz
= 148.5 MHz
= 148.5 MHz
= 74.25 MHz
= 74.25 MHz
Condition
Notes
No
No
No
(1), (2),
Commercial & Industrial
Arria GX Device Handbook, Volume 1
(3)
DC and Switching Characteristics
-6 Speed Grade
(Part 3 of 3)
> 0.3
> 0.3
> 0.2
> 2
> 1
Unit
UI
UI
UI
UI
UI
4–13
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