ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 281
ep1agx50d
Manufacturer Part Number
ep1agx50d
Description
Arria Gx Device Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EP1AGX50D.pdf
(296 pages)
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Altera Corporation
May 2008
3.3-V LVTTL
3.3-V LVCMOS
2.5 V
1.8 V
1.5-V LVCMOS
SSTL-2 Class I
Table 4–110. Maximum DCD for DDIO Output on Row I/O Pins Without PLL in the Clock Path (Part 1 of 2)
Note (1)
Maximum DCD (ps) for
Row DDIO Output I/O
Standard
3.3-V LVTTL
3.3-V LVCMOS
2.5 V
1.8 V
1.5-V LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL Class I
1.8-V HSTL Class II
1.5-V HSTL Class I
1.5-V HSTL Class II
1.2-V HSTL-12
LVPECL
Table 4–109. Maximum DCD for Non-DDIO Output on Column I/O Pins
3.3/2.5V
Standard I/O Standard
Column I/O Output
440
390
375
325
430
355
TTL/CMOS
Input I/O Standard (No PLL in the Clock Path)
1.8/1.5V
495
450
430
385
490
410
Maximum DCD (ps) for Non-DDIO
SSTL-2
2.5V
170
120
105
160
90
85
-6 Speed Grade
Arria GX Device Handbook, Volume 1
SSTL/HSTL
Output
1.8/1.5V
220
175
155
110
215
135
130
115
100
110
110
115
200
80
80
DC and Switching Characteristics
160
110
100
155
95
75
LVDS
3.3V
105
135
100
75
90
85
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
4–127
Unit
ps
ps
ps
ps
ps
ps
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