ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 132

• Manufacturer Part Number: ep1agx50d
• Description: Arria Gx Device Data Sheet
• Manufacturer: Altera Corporation

High-Speed Differential I/O with DPA Support
High-Speed
Differential I/O
with DPA
Support
2–124
Arria GX Device Handbook, Volume 1
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
Non-
Arria GX
Table 2–29. Supported TDO/TDI Voltage Combinations (Part 2 of 2)
Device
The TDO output buffer meets V
The TDO output buffer meets V
An external 250-Ω pull-up resistor is not required, but recommended if signal levels on the board
are not optimal.
Input buffer must be 3.3-V tolerant.
Input buffer must be 2.5-V tolerant.
Input buffer must be 1.8-V tolerant.
Table
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
VCC = 1.5 V
Buffer Power
2–29:
TDI Input
Arria GX devices contain dedicated circuitry for supporting differential
standards at speeds up to 840 Mbps. LVDS differential I/O standards are
supported in the Arria GX device. In addition, the LVPECL I/O standard
is supported on input and output clock pins on the top and bottom I/O
banks.
The high-speed differential I/O circuitry supports the following
high-speed I/O interconnect standards and applications:
■
■
■
There are two dedicated high-speed PLLs (PLL1 and PLL2) in the
EP1AGX20 and EP1AGX35 devices and up to four dedicated high-speed
PLLs (PLL1, PLL2, PLL7, and PLL8) in the EP1AGX50, EP1AGX60, and
EP1AGX90 devices to multiply reference clocks and drive high-speed
differential SERDES channels in I/O banks 1 and 2.
Tables 2–30
can clock in each of the Arria GX devices. In
first row for each transmitter or receiver provides the maximum number
of channels that each fast PLL can drive in its adjacent I/O bank (I/O
Bank 1 or I/O Bank 2). The second row shows the maximum number of
V
C C I O
v
v
v
OH
OH
SPI-4 Phase 2 (POS-PHY Level 4)
SFI-4
Parallel RapidIO standard
v
(1),
(1),
(1),
(MIN) = 2.4 V.
(MIN) = 2.0 V.
= 3.3 V
(1)
(4)
(4)
(4)
through
Arria GX TDO V
V
C C I O
v
v
v
v
2–34
(2),
(2),
= 2.5 V
(2)
(2)
(5)
(5)
show the number of channels that each fast PLL
C C I O
V
C C I O
Voltage Level in I/O Bank 4
v
v
v
v
= 1.8 V V
(3)
(3)
(6)
Tables 2–30
Level shifter
Level shifter
Level shifter
C C I O
required
required
required
v
= 1.5 V V
Altera Corporation
through
Level shifter
Level shifter
Level shifter
C C I O
required
required
required
May 2008
2–34
v
= 1.2 V
the