AN1849 Motorola / Freescale Semiconductor, AN1849 Datasheet - Page 7

• Manufacturer Part Number: AN1849
• Description: MPC107 Design Guide
• Manufacturer: Motorola / Freescale Semiconductor

Using these values, the only other data we need is:
The first two can usually be determined (or predetermined). The latter is generally obtained from the data
sheet, however in the case of SDRAM DIMM sockets, the user may install a module of varying loading
factors. The designer using DIMMs and allowing user-upgrades should design to the worst-possible loading
using.Table 3.
Two equations have to be dragged in from the references, however. The first is a simple reminder that
capacitive loads should be treated as a distributed load over the total trace length, as shown in the following
equation (as opposed to just a lumped value):
In addition, a second equation for determining the line delay of the trace (both inherent in the copper traces
and due to the capacitive loading) is needed:
•
•
•
Height
0.005
Trace
Bus speed
Maximum memory trace length (clocks, controls, and data)
Capacitive loads (number and quantity)
Notes:
1. Loads are per-bank. For dual-bank DIMMs, multiply loads by 2.
2. Loads are per-bank for DQ and CLK0. All others remain constant.
3. Not generally recommended due to large loading.
4. Preferred for large memory arrays.
5. No guarantees that these values are worst-case.
DIMM Type
unbuffered
unbuffered
unbuffered
registered
Width
Trace
0.005
Table 3. Typical SDRAM DIMM Module Capacitance
Component
Table 2. Assumed PCB Electrical Parameters
SDRAM
16 bits
Width
4 bits
8 bits
any
Impedance
63.83 Ω
Z
C
0
O
′
delay
=
MPC107 Design Guide
Controls: CKE,
C
WE, CS, etc.
O
=
+
7.5 pF
70 pF
50 pF
30 pF
N
------------------ -
length
O
L
O
⋅
3.93 nH/cm
Inductance
C
9.97 nH/in
⋅
Typical Capacitance
L
C
O
L
′
(
0
ps/cm
Clock
)
40 pF
30 pF
15 pF
26 pF
Capacitance
0.91 pF/cm
2.31 pF/in
66–100 MHz
2–15 cm
5–100 pF
DQ, DQM
C
20 pF
12 pF
0
5 pF
9 pF
Propagation Delay
Notes
1, 3
2, 4
58.06 ps/cm
147.47 ps/in
1
1
Clocks
7