AN1849 Motorola / Freescale Semiconductor, AN1849 Datasheet - Page 14

• Manufacturer Part Number: AN1849
• Description: MPC107 Design Guide
• Manufacturer: Motorola / Freescale Semiconductor

1.5.3 I
DIMMs and SODIMMs contain an I
used on the assembly. This allows the memory controller to adjust the memory timing parameters in the
MPC107 MCCR(1:4) register to get the best performance. Using the I
relatively easy to obtain the data from DIMMs and from one SODIMM. Since DIMMs have dedicated
address pins for the EEPROMs, all the I
SODIMMs do not have I
system uses more than one SODIMM, only one of the devices can be directly connected to the I
There are two workarounds for this:
The latter method requires some general-purpose outputs to be available and requires a low-impedance
(bidirectional) switch for each SODIMM I
information will be based on the first (and only) SODIMM. This is not unreasonable, in fact, since the
MPC107 does not support variable timing for each bank (RDLAT, CL, ACTOPRE, etc. are all common).
The only variables which can differ on each bank are the size and type (2-bank/4-bank, 16Mb/64Mb) of
SDRAM; software can be used to discover such information. The only caveat is that the first SODIMM
should not be faster than the remaining devices, or too-aggressive timing would be used.
Typically, initialization code sets the SDRAM settings to “safe” values; slow but reliable operation at any
frequency or SDRAM speed. Then, once memory is available for use, and software can be more easily
written, the EEPROM can be read and processed. An example of this is in the DINK32 V12 debugger, where
the “except2.s” module, which handles reset initialization, sets the system for 32MB of SDRAM at a speed
of 3 clocks. This function is written in assembly language and does not have access to dynamic memory for
storage, so accessing an I
running, the “meminfo” command can be automatically invoked to adjust the memory timing based on I
data and the current memory bus clock speed. The source code for these modules are available on the web
at http://www.mot.com/SPS/PowerPC/teksupport/tools.
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Use only information from the first SODIMM.
Use software-controlled switches to switch SCK between each SODIMM.
2
C EEPROM Data
MPC107
SCK
SDA
2
2
C EEPROM address pins, instead all EEPROMs have the address 0x50. If a
C and processing the results would be quite difficult. Once the debugger is
SODIMM
Figure 9. I
2
C EEPROM which contains a description of the SDRAM components
MPC107 Design Guide
2
C signals can be wired from point-to-point. Unfortunately,
2
C port. The first method simply assumes that the timing
2
C SODIMM Expansion
SODIMM
2
C controller of the MPC107, it is
GP_OUT
GPIO
2
C bus.
2
C