AN1849 Motorola / Freescale Semiconductor, AN1849 Datasheet - Page 23

• Manufacturer Part Number: AN1849
• Description: MPC107 Design Guide
• Manufacturer: Motorola / Freescale Semiconductor

The PLL power connections should be kept as short as possible between the pin and the series resistor. The
AVDD pin is near the exterior of the MPC107, and so its filter can be placed on either the top or bottom
layer, as desired. The ideal placement for LAVDD is on the bottom of the board in the center (vacant) ring;
this achieves the minimum trace length but requires using a dual-sided board. For PCBs not using dual-sided
components, the LAVDD filter should be placed as near the exterior as possible. The power consumption is
very small so normal (~6 mA), so normal trace widths can be used; preferentially the traces should not cross
or otherwise couple to “noisy” traces such as clocks, address or data buses.
1.8 Interrupt Controller
The MPC107 includes an interrupt controller, the EPIC (Embedded Programmable Interrupt Controller)
which gathers interrupts from several sources and, if enabled, signals the CPU with the INT output. The
EPIC function replaces logic usually provided by external logic, typically a “south bridge” component. In
addition to reducing board space and cost by eliminating a (possibly unneeded) south bridge, the EPIC also
includes several features not possible with a standard PC-type PIC, including:
The EPIC is a subset of the industry-standard OpenPIC™, lacking only the ability to route interrupts to
multiple processors. An example is shown in the following Figure 17.
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5 parallel or 16 serial interrupt inputs
PCI INTA# assertion
Programmable timer interrupts
I
DMA completion interrupts
SRESET generation
2
O interrupts
+2.5V
Figure 16. MPC107 PLL/DLL Filters
2x 2.2uF
nonpol
smd0805
2x 2.2uF
nonpol
smd0805
10 Ω
10 Ω
MPC107 Design Guide
LAVDD
AVDD
MPC107
Interrupt Controller
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