AN1849 Motorola / Freescale Semiconductor, AN1849 Datasheet - Page 18

• Manufacturer Part Number: AN1849
• Description: MPC107 Design Guide
• Manufacturer: Motorola / Freescale Semiconductor

PCI Interface
MPC7400
MPC7400
MPC7400
MPC7400
“L”
“X”
“A”
“E”
MPC107
MPC107
other PCI devices
Figure 11. Multiple MPC107-based System
In systems where such an environment is not desired, or where the MPC107 is operating as a host, the
active-high IDSEL pin must be tied low to prevent configuration cycles from being accepted.
1.6.1 66-MHz PCI PLL Adjustment
The MPC107 supports operating the PCI bus at 66 MHz. Supporting this higher speed requires little special
design effort other than the usual, good, high-speed design practices. One issue that may arise, though, is to
design a card which automatically adjusts to a changing clock rate. In a PCI environment, the M66EN signal
is used to globally configure with adjusting the PLL settings; if all cards are 66 MHz-capable, M66EN floats
high and the PCI clock input will switch to 66 MHz. However, the MPC107 relies upon statically-encoded
PLL settings to set both the PCI frequency and its own core frequency. Furthermore, this internal core
frequency must match the bus frequency of the processor in order for the two devices to be able to
communicate.
Therefore, for an MPC107-based system to operate in a flexible 33 MHz or 66 MHz PCI bus, external logic
is required to dynamically change the PLL settings. If the MPC107 is operating in a 33 MHz environment,
it is sufficient to ground the M66EN pin as all non-66 MHz-capable cards do. In this environment, the PLL
settings can be specified to get the maximum performance and then left alone. For a dual-speed
environment, however, it may be necessary to insert logic into the PLL settings path, as shown in Figure 12.
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MPC107 Design Guide