AN1849 Motorola / Freescale Semiconductor, AN1849 Datasheet - Page 34

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AN1849

Manufacturer Part Number
AN1849
Description
MPC107 Design Guide
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
As shown in Figure 27, the SRESET output in the EPIC unit is used to drive system reset logic, assuring
that all other devices see a general reset signal. Note that when the reset controller asserts HRESET to the
MPC107, the SRESET output will be cleared. To insure a stable reset system, the SRESET output should
be connected to a switch debounced input of the reset controller, so that HRESET will continue to be
asserted for the required amount of time, even when the SRESET signal is deasserted.
1.11 Packaging
The MPC107 uses a 25x25 TBGA package, which while much larger than the MPC106 package, reduces
overall board space by incorporating the memory data bus buffers, clock drivers, and I/O decoders.
In addition, the MPC107 uses annular ring of pads instead of a solid grid, so vias and escapes can be easily
placed within the chip area to facilitate PCB routing. For boards using double-sided components, the
MPC107 core supply, PLL filters and power/ground bypass capacitors can be placed within the center ring
(on the bottom of the PCB) for even greater space savings as well as superior electrical characteristics.
34
+3.3V
+2.5V
MPC10x
Data Bus Buffers
Clock Driver
I/O Decoder PAL
Total
Monitor
Reset
Table 12. MPC106 vs. MPC107 Board Space Usage
Figure 27. MPC107 Self-Hard-Reset Connections
RST
Object
PCIRST
HRESET
MPC107 Design Guide
MPC107
HRESET_CPU
525 mm
1300 mm
400 mm
400 mm
2275 mm
SRESET
MPC106
2
2
2
2
2
1089 mm
0
0
0
1089 mm
+3.3V
+3.3V
MPC107
1KW
1KW
2
2
HRESET
SRESET
MPC7400

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