AN1849 Motorola / Freescale Semiconductor, AN1849 Datasheet - Page 19

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AN1849

Manufacturer Part Number
AN1849
Description
MPC107 Design Guide
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
The actual logic is highly dependant on the available and desired speeds of the PowerPC processor and the
memory bus. If the PLL setting is fixed for a board (not changeable by the end user), a simple example
would be:
PLL(0 TO 3) <=
and so forth. In the preceding example, one of two different PLL codes are selected based upon the M66EN
pin. This pin, and the PLL codes presented to the MPC107, must be active and stable during the HRESET
signal until it is deasserted.
For systems which want to support multiple processor and/or memory bus speeds, the preceding logic can
be generalized to alter the user settings based upon the M66EN status.
CASE (SPEED & M66EN) IS
WHEN
WHEN
WHEN
WHEN
END CASE;
In the above example, the M66EN input is controlled by the PCI bus and “SPEED” is controlled by a single
user-changeable setting, for example, a four-position rotary switch. As long as the memory bus speed is held
constant, the processor PLL settings do not need to be changed. Otherwise, the CPUPLL settings can be
added to the programmable logic to control both the CPU and the MPC107.
1.6.2 PCI Output Hold Time
The MPC107 has programmable output hold time which can be adjusted to meet system requirements. The
PCI specification allows 2 ns skew between any two clock signals, point-to-point. The default output hold
time of the MPC107 is 2.9ns, which works well with a typical 33 MHz PCI-based system.
However, when the PCI bus speed is increased to 66 MHz, the allowable clock skew tightens to 1ns. With
the output hold at nearly 3 ns and with a 15ns bus period, it may be difficult to design a system; one way is
to use the programmable output hold feature of the MPC107. Using the M66EN signal to control the default
settings for PCI hold time, as shown in Figure 13, performs this adjustment automatically.
"00"
"01"
"10"
"11"
M66EN
"
=>
=>
=>
=>
ELSE
0000
"
Figure 12. MPC107 PLL Dynamic Configuration
"
0100
"
SWITCHES
WHEN (M66EN = ‘1’)-- PCI=66, MEM=66
PLL(0 TO 3) <=
PLL(0 TO 3) <=
PLL(0 TO 3) <=
PLL(0 TO 3) <=
PLD
MPC107 Design Guide
"0001";
"1101";
"1000";
"1100";
-- PCI=33, MEM=66
PLL(0:3)
-- PCI=33, MEM=66
-- PCI=66, MEM=66
-- PCI=33, MEM=100
-- PCI=66, MEM=100
MPC107
PCI Interface
19

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