AN1849 Motorola / Freescale Semiconductor, AN1849 Datasheet - Page 16

• Manufacturer Part Number: AN1849
• Description: MPC107 Design Guide
• Manufacturer: Motorola / Freescale Semiconductor

memory bus speed. It may be necessary or desirable to add a buffer between the MPC107 signals and the
address pins of the ROMs if more than the minimal 8-bit boot ROM is used (which has only one load and
is indistinguishable from a buffer).
In a similar fashion, a large ROM array may also load the memory data bus, though not as severely, and may
also require buffering. Unlike address buffers, which can be permanently enabled, the data bus buffers must
switch directions using the FOE and RCSx pins. Figure 10 shows an example of a heavily-loaded ROM
system.
The ROM address and control buffers uses a high-density output-only buffer, such as the
SN74ALVCH32244, which can be permanently enabled. The data bus buffers use bidirectional transceiver,
such as the SN74ALVCH32245, which is enabled on RCSx (any or all AND’ed together), with the direction
controlled by the FOE pin such that when FOE is low, data flows from B to A.
One special note about memory data bus bit connections: while the SDRAM data bus bits can be connected
16
MPC107
SDMA(13:0)
MDL(0:31)
MDH(0:31)
SDBA(1:0)
PAR(7:0)
RCSx
FOE
WE
Figure 10. Buffered ROM System
A
A
BUF
BUF
MPC107 Design Guide
OE
DIR
DIR
OE
B
B
AR(23:0)
MDH(16:31)
MDL(0:15)
MDL(16:31)
A(19:0)
WE
OE
CS
A(19:0)
WE
OE
CS
A(19:0)
WE
OE
CS
Am29LV800
FLASH
A(19:0)
WE
OE
CS
Am29LV800
FLASH
D(14:0)
Am29LV800
FLASH
D(14:0)
D(15)
Am29LV800
FLASH
D(14:0)
D(15)
D(14:0)
D(15)
D(15)
MDH(17:31)
MDL(17:31)
MDH(0)
MDH(0:15)
MDH(16)
MDL(0)
MDL(0:15)
MDL(16)
memory
system
to SDRAM