SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 859

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SAM3X8E

Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
Datasheets
35.8.15
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• TX_PL: Transmitter Preamble Length
0: The Transmitter Preamble pattern generation is disabled
1 - 15: The Preamble Length is TX_PL x Bit Period
• TX_PP: Transmitter Preamble Pattern
The following values assume that TX_MPOL field is not set:
• TX_MPOL: Transmitter Manchester Polarity
0: Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition.
1: Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition.
• RX_PL: Receiver Preamble Length
0: The receiver preamble pattern detection is disabled
1 - 15: The detected preamble length is RX_PL x Bit Period
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Value
31
23
15
7
00
01
10
11
USART Manchester Configuration Register
US_MAN
0x40098050 (0), 0x4009C050 (1), 0x400A0050 (2), 0x400A4050 (3)
Read-write
Name
ALL_ONE
ALL_ZERO
ZERO_ONE
ONE_ZERO
DRIFT
30
22
14
6
Description
The preamble is composed of ‘01’s
The preamble is composed of ‘1’s
The preamble is composed of ‘0’s
The preamble is composed of ‘10’s
29
21
13
1
5
RX_MPOL
TX_MPOL
28
20
12
4
“USART Write Protect Mode Register” on page
27
19
11
3
26
18
10
2
RX_PL
TX_PL
25
17
9
1
RX_PP
TX_PP
SAM3X/A
SAM3X/A
864.
24
16
8
0
859
859

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