SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 470
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SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 470 of 1465
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26.16.3.1
470
470
SAM3X/A
SAM3X/A
NAND Flash Controller Timing Engine
When the NFC Command register is written, the NFC issues a NAND Flash Command and
optionally performs a data transfer between the NFC SRAM and the NAND Flash device. The
NAND Flash Controller Timing Engine guarantees valid NAND Flash timings, depending on the
set of parameters decoded from the address bus. These timings are defined in the
SMC_TIMINGS register.
For information of the timing used depending on the command, see
Figure 26-36. NAND Flash Controller Timing Engine
See
”NFC Address Command”
Timing Check Engine
register description and
NFCEN=1 NFCWR =1 TADL =1
NFCEN=1 NFCWR=0 TWB != 0
!NFCEN=1 VCMD2=0 ACYCLE!=0 NFCWR=1 TADL != 0
!NFCEN=1 VCMD2=0 ACYCLE!=0 NFCWR=0 TAR != 0
!NFCEN=1 VCMD2=0 ACYCLE!=0 TCLR != 0
NFCEN=0 VCMD2=1 TCLR != 0
Wait TADL
Wait TADL
Wait TCLR
Wait TCLR
Wait TWB
Wait TAR
”SMC Timings
Figure
Register”.
26-36:
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
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