SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 1309

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

41.6.26
These registers reset to zero on a read and stick at all ones when they count to their maximum value. They should be read
frequently enough to prevent loss of data. The receive statistics registers are only incremented when the receive enable bit
is set in the network control register. To write to these registers, bit 7 must be set in the network control register. The statis-
tics register block contains the following registers.
41.6.26.1
Name:
Address:
Access:
• FROK: Pause Frames received OK
A 16-bit register counting the number of good pause frames received. A good frame has a length of 64 to 1518 (1536 if bit
8 set in network configuration register) and has no FCS, alignment or receive symbol errors.
41.6.26.2
Name:
Address:
Access:
• FTOK: Frames Transmitted OK
A 24-bit register counting the number of frames successfully transmitted, i.e., no underrun and not too many retries.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
31
23
15
–
–
7
–
7
EMAC Statistic Registers
Pause Frames Received Register
Frames Transmitted OK Register
EMAC_PFR
0x400B003C
Read-write
EMAC_FTO
0x400B0040
Read-write
30
22
14
30
22
14
–
–
6
–
6
29
21
13
29
21
13
–
–
5
–
5
28
20
12
28
20
12
–
–
4
–
4
FROK
FROK
FTOK
FTOK
FTOK
27
19
11
27
19
11
–
–
3
–
3
26
18
10
26
18
10
–
–
2
–
2
25
17
25
17
–
–
9
1
–
9
1
SAM3X/A
SAM3X/A
24
16
24
16
–
–
8
0
–
8
0
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