SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 1167
SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
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39.6.3.5
Name:
Address:
Access:
• DMA_x: DMA Channel x Interrupt Enable
This bit is set when the corresponding bit in UOTGHS_HSTIER is written to one. This will enable the DMA Channel x Inter-
rupt (UOTGHS_HSTISR.DMA_x).
This bit is cleared when the corresponding bit in UOTGHS_HSTIDR is written to one. This will disable the DMA Channel x
Interrupt (UOTGHS_HSTISR.DMA_x).
• PEP_x: Pipe x Interrupt Enable
This bit is set when the corresponding bit in UOTGHS_HSTIER is written to one. This will enable the Pipe x Interrupt
(UOTGHS_HSTISR.PEP_x).
This bit is cleared when the PEP_x bit is written to one. This will disable the Pipe x Interrupt (PEP_x).
• HWUPIE: Host Wake-Up Interrupt Enable
This bit is set when UOTGHS_HSTIER.HWUPIES bit is written to one. This will enable the Host Wake-up Interrupt
(UOTGHS_HSTISR.HWUPI).
This bit is cleared when UOTGHS_HSTIDR.HWUPIEC bit is written to one. This will disable the Host Wake-up Interrupt
(UOTGHS_HSTISR.HWUPI).
• HSOFIE: Host Start of Frame Interrupt Enable
This bit is set when UOTGHS_HSTIER.HSOFIES bit is written to one. This will enable the Host Start of Frame interrupt
(UOTGHS_HSTISR.HSOFI).
This bit is cleared when UOTGHS_HSTIDR.HSOFIEC bit is written to one. This will disable the Host Start of Frame inter-
rupt (UOTGHS_HSTISR.HSOFI).
• RXRSMIE: Upstream Resume Received Interrupt Enable
This bit is set when UOTGHS_HSTIER.RXRSMIES bit is written to one. This will enable the Upstream Resume Received
interrupt (UOTGHS_HSTISR.RXRSMI).
This bit is cleared when UOTGHS_HSTIDR.RXRSMIEC bit is written to one. This will disable the Downstream Resume
interrupt (UOTGHS_HSTISR.RXRSMI).
• RSMEDIE: Downstream Resume Sent Interrupt Enable
This bit is set when UOTGHS_HSTIER.RSMEDIES bit is written to one. This will enable the Downstream Resume interrupt
(UOTGHS_HSTISR.RSMEDI).
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
PEP_7
31
23
15
–
–
7
–
Host Global Interrupt Mask Register
UOTGHS_HSTIMR
0x400AC410
Read-only
HWUPIE
DMA_6
PEP_6
30
22
14
–
6
HSOFIE
DMA_5
PEP_5
29
21
13
–
5
RXRSMIE
DMA_4
PEP_4
28
20
12
–
4
RSMEDIE
DMA_3
PEP_3
27
19
11
–
3
DMA_2
PEP_2
RSTIE
26
18
10
–
2
DDISCIE
DMA_1
PEP_9
PEP_1
25
17
9
1
SAM3X/A
SAM3X/A
DCONNIE
PEP_8
PEP_0
24
16
–
8
0
1167
1167
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