SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 1199
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SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 1199 of 1465
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39.6.3.23
Name:
Address:
Access:
• BUFF_ADD: Buffer Address
This field determines the AHB bus starting address of a DMA channel transfer.
Channel start and end addresses may be aligned on any byte boundary.
The firmware may write this field only when the UOTGHS_HSTDMASTATUS.CHANN_ENB bit is clear.
This field is updated at the end of the address phase of the current access to the AHB bus. It is incrementing of the access
byte width. The access width is 4 bytes (or less) at packet start or end, if the start or end address is not aligned on a word
boundary.
The packet start address is either the channel start address or the next channel address to be accessed in the channel
buffer.
The packet end address is either the channel end address or the latest channel address accessed in the channel buffer.
The channel start address is written by software or loaded from the descriptor, whereas the channel end address is either
d e t e r m i n e d
UOTGHS_HSTDMACONTROLx.END_TR_EN bit is set.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
7
Host DMA Channel x Address Register
UOTGHS_HSTDMAADDRESSx [x=1..7]
0x400AC714 [1], 0x400AC724 [2], 0x400AC734 [3], 0x400AC744 [4], 0x400AC754 [5], 0x400AC764 [6],
0x400AC774 [7]
Read-write
b y
30
22
14
t h e
6
e n d
o f
29
21
13
5
b u f f e r
o r
28
20
12
4
BUFF_ADD
BUFF_ADD
BUFF_ADD
BUFF_ADD
t h e
U S B
27
19
11
3
d e v i c e ,
U S B
26
18
10
2
e n d
o f
25
17
9
1
t r a n s f e r
SAM3X/A
SAM3X/A
24
16
8
0
i f
1199
1199
t h e
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