SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 472
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SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 472 of 1465
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26.16.4.2
26.16.5
472
472
SAM3X/A
SAM3X/A
NAND Flash Operations
NFC SRAM Access Prioritization Algorithm
Table 26-10. NFC SRAM Mapping with NAND Flash Page Size of 4 Kbytes + 128 bytes
When the NAND Flash Controller (NFC) is reading from or writing to the NFC SRAM, the internal
memory is no longer accessible. If an NFC SRAM access occurs when the NFC performs a read
or write operation then the access is discarded. The write operation is not performed. The read
operation returns undefined data. If this situation is encountered, the status flag AWB located in
the NFC status Register is raised and indicates that a shared resource access violation has
occurred.
This section describes the software operations needed to issue commands to the NAND Flash
device and perform data transfers using NFC.
Offset
0x00001000-0x0000100F
0x00001010-0x0000101F
0x00001020-0x0000102F
0x00001030-0x0000103F
0x00001040-0x0000104F
0x00001050-0x0000105F
0x00001060-0x0000106F
0x00001070-0x0000107F
0x00001080-0x00001FFF
Use
Bank 0 Spare Area 0
Bank 0 Spare Area 1
Bank 0 Spare Area 2
Bank 0 Spare Area 3
Bank 0 Spare Area 4
Bank 0 Spare Area 5
Bank 0 Spare Area 6
Bank 0 Spare Area 7
Reserved
Access
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
–
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
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