SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 236
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 236 of 1465
- Download datasheet (26Mb)
13.5.3
Name:
Address:
Access:
• URSTEN: User Reset Enable
0: The detection of a low level on the pin NRST does not generate a User Reset.
1: The detection of a low level on the pin NRST triggers a User Reset.
• URSTIEN: User Reset Interrupt Enable
0: USRTS bit in RSTC_SR at 1 has no effect on rstc_irq.
1: USRTS bit in RSTC_SR at 1 asserts rstc_irq if URSTEN = 0.
• ERSTL: External Reset Length
This field defines the external reset length. The external reset is asserted during a time of 2
allows assertion duration to be programmed between 60 μs and 2 seconds.
• KEY: Password
Should be written at value 0xA5. Writing any other value in this field aborts the write operation.
236
236
31
23
15
–
–
7
–
SAM3X/A
SAM3X/A
Reset Controller Mode Register
RSTC_MR
0x400E1A08
Read-write
30
22
14
–
–
6
–
29
21
13
–
–
5
URSTIEN
28
20
12
–
–
4
KEY
27
19
11
–
3
–
26
18
10
–
2
–
ERSTL
(ERSTL+1)
25
17
–
9
1
–
Slow Clock cycles. This
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
URSTEN
24
16
–
8
0
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