SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 476

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

Figure 26-39. Parity Generation for 512/1024/2048/4096 8-bit Words
476
476
(page size -1 )th byte
(page size -2 )th byte
(page size -3 )th byte
Page size th byte
SAM3X/A
SAM3X/A
Page size = 512 Px = 2048
Page size = 1024 Px = 4096
Page size = 2048 Px = 8192
Page size = 4096 Px = 16384
2nd byte
4 th byte
3rd byte
1st byte
ECC Status Registers, ECC Parity Registers are cleared when a read/write command is
detected or a software reset is performed.
For Single-bit Error Correction and Double-bit Error Detection (SEC-DED) Hsiao code is used.
24-bit ECC is generated in order to perform one bit correction per 256 or 512 bytes for pages of
512/2048/4096 8-bit words. 32-bit ECC is generated in order to perform one bit correction per
512/1024/2048/4096 8- or 16-bit words. They are generated according to the schemes shown in
Figure 26-39
To calculate P8’ to PX’ and P8 to PX, apply the algorithm that follows.
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
P1
• Non correctable error: The MULERR flag in the ECC Status Registers
(ECC_SR1/ECC_SR2) is set. Several unrecoverable errors have been detected in the Flash
memory page.
P2
Page size = 2
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
P1'
for i =0 to n
begin
for (j = 0 to page_size_byte)
begin
if(j[i] ==1)
P4
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
and
P1
P2'
Figure
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
n
P1'
26-40.
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
P1
P2
P1=bit7(+)bit5(+)bit3(+)bit1(+)P1
P2=bit7(+)bit6(+)bit3(+)bit2(+)P2
P4=bit7(+)bit6(+)bit5(+)bit4(+)P4
P1'=bit6(+)bit4(+)bit2(+)bit0(+)P1'
P2'=bit5(+)bit4(+)bit1(+)bit0(+)P2'
P4'=bit7(+)bit6(+)bit5(+)bit4(+)P4'
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
P1'
P4'
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
P1
P2'
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
P1'
P8
P8'
P8
P8'
P8
P8'
P8
P8'
P16'
P16'
P16
P16
P32
P32
P32
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
PX
PX'