SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 407
SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 407 of 1465
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Figure 25-1. SDRAM Device Initialization Sequence
25.5.2
25.5.3
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
SDRAMC_A[12:11]
SDRAMC_A[9:0]
SDCKE
SDWE
SDCK
SDCS
RAS
CAS
NBS
A10
I/O Lines
Interrupt
Inputs Stable for
200 sec
The pins used for interfacing the SDRAM Controller may be multiplexed with the PIO lines. The
programmer must first program the PIO controller to assign the SDRAM Controller pins to their
peripheral function. If I/O lines of the SDRAM Controller are not used by the application, they
can be used for other purposes by the PIO Controller.
The SDRAM Controller interrupt (Refresh Error notification) is connected to the Memory
Controller.
Using the SDRAM Controller interrupt requires the Interrupt Controller to be programmed first.
Table 25-5.
Precharge All Banks
SDRAMC
Instance
Peripheral IDs
t
RP
1st Auto-refresh
10
ID
8th Auto-refresh
t
RC
MRS Command
t
MRD
SAM3X/A
SAM3X/A
Valid Command
407
407
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