SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 663
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SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 663 of 1465
- Download datasheet (26Mb)
31.7.19
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• P0-P31: Multi Drive Disable.
0: No effect.
1: Disables Multi Drive on the I/O line.
31.7.20
Name:
Address:
Access:
• P0-P31: Multi Drive Status.
0: The Multi Drive is disabled on the I/O line. The pin is driven at high and low level.
1: The Multi Drive is enabled on the I/O line. The pin is driven at low level only.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
P31
P23
P15
P31
P23
P15
P7
P7
31
23
15
31
23
15
7
7
PIO Multi-driver Disable Register
PIO Multi-driver Status Register
PIO_MDDR
0x400E0E54 (PIOA), 0x400E1054 (PIOB), 0x400E1254 (PIOC), 0x400E1454 (PIOD), 0x400E1654 (PIOE),
0x400E1854 (PIOF)
Write-only
PIO_MDSR
0x400E0E58 (PIOA), 0x400E1058 (PIOB), 0x400E1258 (PIOC), 0x400E1458 (PIOD), 0x400E1658 (PIOE),
0x400E1858 (PIOF)
Read-only
P30
P22
P14
P30
P22
P14
P6
P6
30
22
14
30
22
14
6
6
P29
P21
P13
P29
P21
P13
P5
P5
29
21
13
29
21
13
5
5
P28
P20
P12
P28
P20
P12
P4
P4
28
20
12
28
20
12
4
4
“PIO Write Protect Mode Register”
P27
P19
P11
P27
P19
P11
P3
P3
27
19
11
27
19
11
3
3
P26
P18
P10
P26
P18
P10
P2
P2
26
18
10
26
18
10
2
2
.
P25
P17
P25
P17
P9
P1
P9
P1
25
17
25
17
9
1
9
1
SAM3X/A
SAM3X/A
P24
P16
P24
P16
P8
P0
P8
P0
24
16
24
16
8
0
8
0
663
663
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