SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 157
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SAM3X8E
Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
- Current page: 157 of 1465
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11.20.4
• SETPEND
Interrupt set-pending bits.
Write:
0: no effect.
1: changes interrupt state to pending.
Read:
0: interrupt is not pending.
1: interrupt is pending.
Writing 1 to the ISPR bit corresponding to:
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
• an interrupt that is pending has no effect
• a disabled interrupt sets the state of that interrupt to pending
31
23
15
7
Interrupt Set-pending Registers
30
22
14
6
The ISPR0-ISPR1 register forces interrupts into the pending state, and shows which interrupts
are pending. See:
The bit assignments are:
• the register summary in
•
Table 11-28 on page 154
29
21
13
5
28
20
12
4
Table 11-27 on page 153
for which interrupts are controlled by each register.
SETPEND
SETPEND
SETPEND
SETPEND
27
19
11
3
for the register attributes
26
18
10
2
25
17
9
1
SAM3X/A
SAM3X/A
24
16
8
0
157
157
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