SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 923

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

35.7.16
Name:
Address:
Access:
• WRDY: Write Ready for Synchronous Channels Update
0 = New duty-cycle and dead-time values for the synchronous channels cannot be written.
1 = New duty-cycle and dead-time values for the synchronous channels can be written.
• ENDTX: PDC End of TX Buffer
0 = The Transmit Counter register has not reached 0 since the last write of the PDC.
1 = The Transmit Counter register has reached 0 since the last write of the PDC.
• TXBUFE: PDC TX Buffer Empty
0 = PWM_TCR or PWM_TCNR has a value other than 0.
1 = Both PWM_TCR and PWM_TCNR have a value other than 0.
• UNRE: Synchronous Channels Update Underrun Error
0 = No Synchronous Channels Update Underrun has occurred since the last read of the PWM_ISR2 register.
1 = At least one Synchronous Channels Update Underrun has occurred since the last read of the PWM_ISR2 register.
• CMPMx: Comparison x Match
0 = The comparison x has not matched since the last read of the PWM_ISR2 register.
1 = The comparison x has matched at least one time since the last read of the PWM_ISR2 register.
• CMPUx: Comparison x Update
0 = The comparison x has not been updated since the last read of the PWM_ISR2 register.
1 = The comparison x has been updated at least one time since the last read of the PWM_ISR2 register.
Note:
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
CMPM7
CMPU7
31
23
15
–
7
–
Reading PWM_ISR2 automatically clears flags WRDY, UNRE and CMPSx.
PWM Interrupt Status Register 2
PWM_ISR2
0x40020040
Read-only
CMPU6
CMPM6
30
22
14
–
6
–
CMPU5
CMPM5
29
21
13
–
5
–
CMPU4
CMPM4
28
20
12
–
4
–
CMPM3
CMPU3
UNRE
27
19
11
–
3
TXBUFE
CMPM2
CMPU2
26
18
10
–
2
CMPM1
CMPU1
ENDTX
SAM3S8/SD8
SAM3S8/SD8
25
17
–
9
1
CMPM0
CMPU0
WRDY
24
16
–
8
0
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