SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 834

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

34.8.4
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SAM3S8/SD8
SAM3S8/SD8
Write Operation
In write operation, the HSMCI Mode Register (HSMCI_MR) is used to define the padding value
when writing non-multiple block size. If the bit PDCPADV is 0, then 0x00 value is used when
padding data, otherwise 0xFF is used.
If set, the bit PDCMODE enables PDC transfer.
The following flowchart
PDC facilities. Polling or interrupt method can be used to wait for the end of write according to
the contents of the Interrupt Mask Register (HSMCI_IMR).
(Figure
34-9) shows how to write a single block with or without use of
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12