SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 615

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SAM3SD8C

Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
Datasheets
Figure 29-18. TWI Read Operation with Single Data Byte without Internal Address
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
Read Receive Holding Register
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
TWI_CR = START | STOP
Read ==> bit MREAD = 1
Set the Control register:
- Device slave address
- Transfer direction bit
Read Status register
Read status register
(Needed only once)
Start the transfer
- Master enable
Yes
TXCOMP = 1?
Yes
Set TWI clock
RXRDY = 1?
BEGIN
END
No
No
SAM3S8/SD8
SAM3S8/SD8
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615

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