SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 550

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SAM3SD8C

Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
Datasheets
27.7.49
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• PCEN: Parallel Capture Mode Enable
0: The parallel capture mode is disabled.
1: The parallel capture mode is enabled.
• DSIZE: Parallel Capture Mode Data Size
• ALWYS: Parallel Capture Mode Always Sampling
0: The parallel capture mode samples the data when both data enables are active.
1: The parallel capture mode samples the data whatever the data enables are.
• HALFS: Parallel Capture Mode Half Sampling
Independently from the ALWYS bit:
0: The parallel capture mode samples all the data.
1: The parallel capture mode samples the data only one time out of two.
• FRSTS: Parallel Capture Mode First Sample
This bit is useful only if the HALFS bit is set to 1. If data are numbered in the order that they are received with an index from
0 to n:
0: Only data with an even index are sampled.
1: Only data with an odd index are sampled.
550
550
Value
0
1
2
3
31
23
15
7
SAM3S8/SD8
SAM3S8/SD8
PIO Parallel Capture Mode Register
Name
BYTE
HALF-WORD
WORD
-
30
22
14
PIO_PCMR
0x400E0F50 (PIOA), 0x400E1150 (PIOB), 0x400E1350 (PIOC)
Read-write
6
Description
The reception data in the PIO_PCRHR register is a BYTE (8-bit)
The reception data in the PIO_PCRHR register is a HALF-WORD (16-bit)
Reserved
The reception data in the PIO_PCRHR register is a WORD (32-bit)
29
21
13
5
DSIZE
28
20
12
4
“PIO Write Protect Mode Register”
FRSTS
27
19
11
3
HALFS
26
18
10
2
ALWYS
.
25
17
9
1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
PCEN
24
16
8
0

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