SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 309

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

18.4.3.5
18.4.3.6
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Security Bit Protection
GPNVM Bit
GPNVM bits do not interfere with the embedded Flash memory plane. Refer to the product defi-
nition section for information on the GPNVM Bit Action.
The set GPNVM bit sequence is:
One error can be detected in the EEFC_FSR register after a programming sequence:
It is possible to clear GPNVM bits previously set. The clear GPNVM bit sequence is:
One error can be detected in the EEFC_FSR register after a programming sequence:
The status of GPNVM bits can be returned by the Enhanced Embedded Flash Controller
(EEFC). The sequence is:
For example, if the third bit of the first word read in the EEFC_FRR is set, then the third GPNVM
bit is active.
One error can be detected in the EEFC_FSR register after a programming sequence:
Note:
When the security is enabled, access to the Flash, either through the JTAG/SWD interface or
through the Fast Flash Programming Interface, is forbidden. This ensures the confidentiality of
the code programmed in the Flash.
The security bit is GPNVM0.
• Start the Set GPNVM Bit command (SGPB) by writing the Flash Command Register with the
• When the GPVNM bit is set, the bit FRDY in the Flash Programming Status Register
• If the GPNVM bit number is greater than the total number of GPNVM bits, then the command
• Command Error: a bad keyword has been written in the EEFC_FCR register.
• Start the Clear GPNVM Bit command (CGPB) by writing the Flash Command Register with
• When the clear completes, the FRDY bit in the Flash Programming Status Register
• If the GPNVM bit number is greater than the total number of GPNVM bits, then the command
• Command Error: a bad keyword has been written in the EEFC_FCR register.
• Start the Get GPNVM bit command by writing the Flash Command Register with GGPB. The
• GPNVM bits can be read by the software application in the EEFC_FRR register. The first
• Command Error: a bad keyword has been written in the EEFC_FCR register.
SGPB command and the number of the GPNVM bit to be set.
(EEFC_FSR) rises. If an interrupt was enabled by setting the FRDY bit in EEFC_FMR, the
interrupt line of the NVIC is activated.
has no effect. The result of the SGPB command can be checked by running a GGPB (Get
GPNVM Bit) command.
CGPB and the number of the GPNVM bit to be cleared.
(EEFC_FSR) rises. If an interrupt has been enabled by setting the FRDY bit in EEFC_FMR,
the interrupt line of the NVIC is activated.
has no effect.
FARG field is meaningless.
word read corresponds to the 32 first GPNVM bits, following reads provide the next 32
GPNVM bits as long as it is meaningful. Extra reads to the EEFC_FRR register return 0.
Access to the Flash in read is permitted when a set, clear or get GPNVM bit command is
performed.
SAM3S8/SD8
SAM3S8/SD8
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