SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 283

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SAM3SD8C

Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
Datasheets
Figure 16-4. Wake Up Sources
16.4.7.1
16.4.7.2
283
283
WKUP15
WKUP0
WKUP1
SAM3S8/SD8
SAM3S8/SD8
Wake Up Inputs
Low Power Debouncer Inputs
rtc_alarm
rtt_alarm
sm_out
Falling/Rising
Falling/Rising
Falling/Rising
WKUPT15
WKUPT0
WKUPT1
Detector
Detector
Detector
Edge
Edge
Edge
The wake up inputs, WKUP0 to WKUP15, can be programmed to perform a wake up of the core
power supply. Each input can be enabled by writing to 1 the corresponding bit, WKUPEN0 to
WKUPEN 15, in the Wake Up Inputs Register (SUPC_WUIR). The wake up level can be
selected with the corresponding polarity bit, WKUPPL0 to WKUPPL15, also located in
SUPC_WUIR.
All the resulting signals are wired-ORed to trigger a debounce counter, which can be pro-
grammed with the WKUPDBC field in the Supply Controller Wake Up Mode Register
(SUPC_WUMR). The WKUPDBC field can select a debouncing period of 3, 32, 512, 4,096 or
32,768 slow clock cycles. This corresponds respectively to about 100 µs, about 1 ms, about
16 ms, about 128 ms and about 1 second (for a typical slow clock frequency of 32 kHz). Pro-
gramming WKUPDBC to 0x0 selects an immediate wake up, i.e., an enabled WKUP pin must be
active according to its polarity during a minimum of one slow clock period to wake up the core
power supply.
If an enabled WKUP pin is asserted for a time longer than the debouncing period, a wake up of
the core power supply is started and the signals, WKUP0 to WKUP15 as shown in
are latched in the Supply Controller Status Register (SUPC_SR). This allows the user to identify
the source of the wake up, however, if a new wake up condition occurs, the primary information
is lost. No new wake up can be detected since the primary wake up condition has disappeared.
It is possible to generate a waveform (RTCOUT0 and RTCOUT1) in all modes (including backup
mode). It can be useful to control an external sensor and/or tampering function without waking
up the processor. Please refer to the RTC section.
Two separate debouncers are embedded for WKUP0 and WKUP1 inputs.
RTCEN
RTTEN
SMEN
WKUPEN15
WKUPEN0
WKUPEN1
WKUPIS0
WKUPIS15
WKUPIS1
SLCK
WKUPDBC
Debouncer
WKUPS
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Figure
Core
Supply
Restart
16-4,

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